Design, Modeling of Ga-As based MESFET for SRAM Cell

Design of Low Power Sram Memory Using 8t Sram Cell

Low power design has become the major challenge of present chip designs as leakage power has been rising with scaling of technologies. As modern technology is spreading fast, it is very important to design low power, high performance, and fast responding SRAM (Static Random Access Memory) since they are critical component in high performance processors. The Conventional 6T SRAM cell is very muc...

Systematic Optimization Technique for MESFET Modeling

(Abstract) Accurate small and large-signal models of metal-semiconductor field effect transistor (MESFET) devices are essential in all modern microwave and millimeter wave applications. Those models are used for robust designs and fabrication development. The sophistication of modern communication systems urged the need of monolithic microwave integrated circuits (MMICs), which consists of many...

Fast Testable Design for SRAM-Based FPGAs

This paper presents a new design for testing SRAM-based field programmable gate arrays (FPGAs). The original FPGA’s SRAM memory is modified so that the FPGA may have the facility to loop the testing configuration data inside the chip. The full testing of the FPGA is achieved by loading typically only one carefully chosen testing configuration data instead of the whole configurations data. The o...

Sram System Design for Memory Based Computing

Design of Ultra Low Power SRAM Cell

In order to achieve a longer battery life suppression of energy consumption is vital. A demand for design methods for less energy consumption is increasing. The subthreshold scaling can reduce energy per cycle significantly by the scaling of supply voltage (VDD) below threshold voltage (Vth). Threshold voltage of CMOS technology represents the value of the gate-source voltage when the current i...